Name: Port A Data Direction Register
Size: 1-32 bits
Address Offset: 0x04
Read/Write Access: Read/Write
Module Instance | Base Address | Register Address |
---|---|---|
i_gpio_0_gpio | 0xFFC02900 | 0xFFC02904 |
i_gpio_1_gpio | 0xFFC02A00 | 0xFFC02A04 |
i_gpio_2_gpio | 0xFFC02B00 | 0xFFC02B04 |
Offset: 0x4
Access: RW
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
gpio_swporta_ddr RW 0x0 |
||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
gpio_swporta_ddr RW 0x0 |
Bit | Name | Description | Access | Reset | ||||||
---|---|---|---|---|---|---|---|---|---|---|
23:0 | gpio_swporta_ddr | Values written to this register independently control the direction of the corresponding data bit in Port A. The default direction can be configured as input or output after system reset through the GPIO_DFLT_SRC_A parameter. 0 Input (default) 1 Output
|
RW | 0x0 |