This address space is allocated for the registers that provide the AXI transfer status and loop counter status for each DMA channel thread.
Module Instance |
Base Address |
End Address |
i_dma_NSAXISTATUS |
0xFFDA0400 |
0xFFDA0CFF |
Important: To prevent indeterminate
system behavior, reserved areas of memory must not be accessed by software or
hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.