sbcfg3

         
      
Module Instance Base Address Register Address
i_io48_hmc_mmr_io48_mmr 0xFFCFA000 0xFFCFA068

Offset: 0x68

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Reserved

cfg_sb_ddr4_mr3

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

cfg_sb_ddr4_mr3

0x0

sbcfg3 Fields

Bit Name Description Access Reset
19:0 cfg_sb_ddr4_mr3
This register stores the DDR4 MR3 Content
RW 0x0