Used to disable individual interfaces between the FPGA and HPS.
This register is reset only on a cold reset (ignores warm reset).
Module Instance | Base Address | Register Address |
---|---|---|
i_sys_mgr_core | 0xFFD06000 | 0xFFD06070 |
Offset: 0x70
Access: RW
Bit Fields | |||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reserved |
emac_2 RW 0x0 |
||||||||||||||
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved |
emac_1 RW 0x0 |
Reserved |
emac_0 RW 0x0 |
Bit | Name | Description | Access | Reset | ||||||
---|---|---|---|---|---|---|---|---|---|---|
20 | emac_2_switch | EMAC FPGA interface switch Enable
|
RW | 0x0 | ||||||
16 | emac_2 | Used to disable signals from the FPGA fabric to the EMAC modules that could potentially interfere with their normal operation. The array index corresponds to the EMAC module instance.
|
RW | 0x0 | ||||||
12 | emac_1_switch | EMAC FPGA interface switch Enable
|
RW | 0x0 | ||||||
8 | emac_1 | Used to disable signals from the FPGA fabric to the EMAC modules that could potentially interfere with their normal operation. The array index corresponds to the EMAC module instance.
|
RW | 0x0 | ||||||
4 | emac_0_switch | EMAC FPGA interface switch Enable
|
RW | 0x0 | ||||||
0 | emac_0 | Used to disable signals from the FPGA fabric to the EMAC modules that could potentially interfere with their normal operation. The array index corresponds to the EMAC module instance.
|
RW | 0x0 |