Intel® Stratix® 10 FPGA 和 SoC FPGA

Intel® Stratix® 10 FPGA 和 SoC FPGA 在效能、電源效率、密度和系統整合方面提供創新優勢。Intel® Stratix® 10 裝置採用革命性的 Intel® Hyperflex™ FPGA 架構，結合 Intel 獲得專利的嵌入式多晶片互聯橋接 (EMIB) 技術、進階介面匯流排 (AIB) 與持續發展中的小晶片組合，與前一代高效能 FPGA 相比，可提供最高 2 倍的效能。1

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Intel® Stratix® 10 FPGA 和 SoC FPGA

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比較產品

產品與效能資訊

1

Comparison based on Stratix® V vs. Intel® Stratix® 10 using Intel® Quartus® Prime Pro 16.1 Early Beta. Stratix® V Designs were optimized using 3 step optimization process of Hyper-Retiming, Hyper-Pipelining, and Hyper-Optimization in order to utilize Intel® Stratix® 10 architecture enhancements of distributed registers in core fabric. Designs were analyzed using Intel® Quartus® Prime Pro Fast Forward Compile performance exploration tool. For more details, refer to Intel® Hyperflex™ FPGA Architecture Overview White Paper: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/wp/wp-01220-hyperflex-architecture-fpga-socs.pdf. Actual performance users will achieve varies based on level of design optimization applied. Tests measure performance of components on a particular test, in specific systems. Differences in hardware, software, or configuration will affect actual performance. Consult other sources of information to evaluate performance as you consider your purchase. For more complete information about performance and benchmark results, visit www.intel.com.tw/benchmarks.