{"collectionRelationTags":{"relations":{"AND":["etm-76481e0d17f54352ae546c2d371ffaeb","etm-463a78c6acd4426dbb9221017285031e"]},"featuredIds":[]},"collectionId":"684748","resultPerPage":24.0,"filters":[{"facetId":"ContentType","type":"ContentType","deprecated":true,"name":"ContentType","position":0},{"facetId":"lastupdated","type":"lastupdated","deprecated":true,"name":"lastupdated","position":1},{"facetId":"Products","type":"Products","deprecated":true,"name":"Products","position":2},{"facetId":"OperatingSystem","type":"OperatingSystem","deprecated":true,"name":"OperatingSystem","position":3}],"coveoRequestHardLimit":"1000","accessDetailsPagePath":"/content/www/us/en/secure/design/internal/access-details.html","collectionGuids":["etm-76481e0d17f54352ae546c2d371ffaeb","etm-463a78c6acd4426dbb9221017285031e"],"cardView":false,"sorting":"Newest","defaultImagesPath":"/content/dam/www/public/us/en/images/uatable/default-icons","coveoMaxResults":5000,"coveoSplitSize":500,"fpgaFacetRootPaths":"{\"fpgadevicefamily\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Programmable Devices\"],\"quartusedition\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software\"],\"quartusaddon\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software - Add-ons\"],\"fpgaplatform\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® FPGA Platforms\"]}","newWrapperPageEnabled":true,"descendingSortingForNumericalFacetsName":"[\"Intel® Quartus® Prime Pro Edition\",\"Intel® Quartus® Prime Lite Edition\",\"Intel® Quartus® Prime Standard Edition\",\"Quartus® II Subscription Edition\",\"Quartus® II Web Edition\"]","columnsConfiguration":{"idColumn":true,"dateColumn":true,"versionColumn":true,"contentTypeColumn":false,"columnsMaxSize":0},"dynamicColumnsConfiguration":[{"name":"DynamicColumn_id","type":"id","gtv":"ID","width":60,"selected":true},{"name":"DynamicColumn_date","type":"date","gtv":"日期","width":60,"selected":true},{"name":"DynamicColumn_version","type":"version","gtv":"版本","width":135,"selected":true}],"updateCollateralMetadataEnabled":true,"relatedAssetsEnable":true,"disableExpandCollapseAll":false,"enableRelatedAssetsOnExpandAll":false,"disableBlueBanner":false,"isICS":false}
產品與效能資訊
1
處理器核心 (P+E) 效能混合式架構在單一處理器裸晶晶粒，結合了效能核心（P 核心）與效率核心（E 核心）這兩款全新的核心微架構。部分第 12 代 Intel® Core™ 處理器（若干第 12 代 Intel Core i5 處理器和更低版本）沒有效能混合式架構，只有 P 核心。
2
Intel® Thread Director 內建於硬體，僅在第 12 代 Intel® Core™ 處理器效能混合式架構配置提供；需要獨立提供作業系統。可用的特色與功能因作業系統而異。
3
效能因使用情形、配置和其他因素而異。請造訪 www.Intel.com.tw/PerformanceIndex 進一步瞭解。
4
效能結果係依配置中所示日期的測試為準，且可能無法反映所有公開可用的安全性更新。請參閱設定檔配置的詳細資訊支援。請造訪 www.Intel.com.tw/PerformanceIndex 進一步瞭解。