Intel® eASIC™ N5X Devices

Today’s emerging innovations in 5G wireless, Cloud and storage, AI, and edge applications require a broad range of new equipment, and one size no longer fits all. Intel® eASIC™ N5X devices offer an innovative solution to custom logic that provides up to 50% lower core power1 and lower unit-cost2 compared to FPGAs while providing faster time to market and lower non-recurring engineering costs when compared to cell based ASICs.3 4

Only Intel enables the complete custom logic continuum of FPGAs, structured ASICs, and ASICs to build equipment tailored to unique challenges of time to market (TTM), cost, power, volume, performance, and flexibility requirements.

Features

Balance Low Power and Performance

Intel’s innovative via configuration technology enables up to 50% lower core power1 or to increase performance in the same power envelope compared to FPGAs. Power consumption is further reduced by disconnecting power from unused device resources minimizing static power consumption.

Optimized TCO

Intel® eASIC™ N5X innovations reduce die size for a given logic and IO capacity and lowers unit cost compared to FPGAs.2 Intel eASIC N5X devices significantly reduce NRE and can be completed in ½ the development time of a cell-based ASIC on comparable process technology.

FPGA Replacement & Custom Packages

Intel® eASIC™ package offerings provide options to closely match an FPGA package footprint to simplify migration and reduce transition cost. Further cost reduction can be achieved using small form factor packages minimizing PCB footprint.

Configurable eCells

Intel’s innovative eCell can be configured as logic, arithmetic or flip-flops. This enables the platform to be optimized on a design by design basis for a combination of high performance logic, DSP or highly pipelined designs.

Transceivers & IO

Intel® eASIC™ N5X transceivers are multi-protocol supporting a wide range of connectivity and networking protocols with continuous rates from 250MHz to 32.44 Gbps. Flexible eIO pins support 1.0V to 1.8V IO natively and 2.5V and 3.3V with in package level shifters. DDR4 interfaces are supported at rates up to 3200Mbps with integrated PLL/DLL between every two IO banks.

Intel FPGA Compatible Processor System and Security

Intel’s innovative quad-core Arm® 64-bit hard processor subsystem (HPS) and secure device manager (SDM)5 are ported from Intel® Agilex™ FPGAs meeting security requirements for 5G and military applications throughout the entire product lifecycle from manufacturing, to deployment, to decommissioning of equipment. These systems facilitate compatible migration from FPGAs to Intel® eASIC™ N5X devices.

Design Flow

Intel® eASIC™ eTools offer a framework for design conversion and validation using a combination of internally developed and industry standard third-party tools. This includes synthesis and simulation libraries, IP wrappers to implement eASIC functions, scripts for code validation and running third party synthesis and simulation tools. Intel® Quartus® software Platform Designer is used for the hard processor system configuration. DSP Builder for Intel® FPGAs can also output FPGA and eASIC ready RTL code.

Intel® eASIC™ N5X Device Overview Tables

 

N5X007

N5X015

N5X024

N5X047

N5X088

eCells1 (M) / Logic Elements (M)

0.70

1.47

2.38

4.65

8.83

Equivalent ASIC gates (M)

7

1.5

2.4

4.7

8.8

M10K Memory

1752

3,684

6,004

11,780

22,372

M10K Memory (Mbits)

17.94

37.72

61.48

120.63

229.09

128b register file

12,488

26,180

42,560

82,992

157,640

128b register file (Mbits)

1.6

3.35

5.45

10.62

20.18

Secure device manager

Secure data manager AES-256/SHA-256 bitstream encryption/authentication, ECDSA 256/384 boot code authentication, anti-tamper protection, 3 independent user root keys.

Vendor authenticated boot (VAB), Secured data object storage (SDOS), Time and priority based key revocation.

Hard Processor System

Quad-core 64-bit Arm Cortex-A53 up to 1.5GHz, with 32 KB Instruction/Data cache, NEON coprocessor, 1 MB L2 cache, direct memory access (Direct Memory Access), system memory management unit, cache coherency unit, hard memory controllers for DDR4/LPDDR4/LPDDR4x, USB 2.0x2, 1G eMac* x3, UART x2, SPI (Serial Peripheral Interface) x4, I2C x5, general purpose timers x7, watchdog timer x4.

SoC IO EMIF* / Pin Mux / Dedicated

140 / 48 / 24

140 / 48 / 24

140 / 48 / 24

140 / 48 / 24

140 / 48 / 24

Max GPIO

416

560

682

682

1114

XCVR 32

16

24

32

64

80

Intel® eASIC™ N5X Example Package Options

Packages can be customized per application requirements to replace an FPGA or reduce PCB footprint for a given application.

 

 

N5X007

N5X015

N5X024

N5X047

N5X088

27x27

FC676, FC1085

Yes

       

29x29

FC780, FC1221

Yes

Yes

     

31x31

FC896

Yes

Yes

Yes

   

35x35

FC1152

Yes

Yes

Yes

   

40x40

FC1517

 

Yes

Yes

Yes

Yes

42.5x42.5

FC1760

   

Yes

Yes

Yes

45x45

FC1932

       

Yes

47.5x47.5

FC2205

   

 

 

Yes

50x50

FC2397

       

Yes

Applications

Wireless

  • 5G radio & small cells
  • Front haul gateways
  • Microwave backhaul

Artificial Intelligence

  • Inferencing applications

Cloud

  • Acceleration
  • Storage

Video & Broadcast

  • Video encoding/decoding
  • Video processing

Military

  • Radar
  • Secure communications
  • Guidance and control

Intel® Enpirion® Power Solutions

Intel® Enpirion® Power Solutions are high-frequency DC-DC step-down power converters designed and validated for Intel® FPGA, CPLD, and SoCs. These robust, easy-to-use power modules integrate nearly all of the components needed to build a power supply – saving you board space and simplifying the design process.

Learn more

產品與效能資訊

1

功率估計由 Intel 於 1 月 28 日完成。Intel® Agilex™ FPGA 的功率估計使用 Intel® Quartus® Prime Design Software 20.3,N5X 裝置的估計則使用矽前驗證。FPGA 裝置為 Intel® Agilex™ FPGA AGF014,Intel® eASIC™ N5X 裝置為 N5X047。使用的邏輯和記憶體時脈速度為 500MHz,兩台裝置的邏輯計時頻率皆為 33%,記憶體計時頻率皆為 50%。

2

單位成本係依據 Intel® FPGA 和 Intel® eASIC™ 裝置中使用相同大小套件的等價邏輯、記憶體、I/O 和收發器。

3

NRE 與工程較標準單元的 ASIC 低,係因為結構化 ASIC 需要的光罩客製化較低、設計步驟較少,並使用預先定義的基礎陣列。

4

效能測試中使用的軟體與工作負載可能僅針對 Intel® 微處理器進行最佳化。包括 SYSmark* 與 MobileMark* 在內的效能測試是使用特定電腦系統、零組件、軟體、作業與功能進行量測。這些因素若有任何異動,均可能導致測得結果產生變化。建議您參考其他資訊與效能測試數據,協助您充分評估欲購買產品的性能,包括該產品在搭配其他產品運作時的效能。
如需詳細資訊,請參閱 www.intel.com/benchmarks

5

沒有產品或元件能提供絕對的安全性。