Example of a Verilog Design File with LPM Function Instantiation

For any parameterized function in the Synopsys^® Synplify software, you must declare all parameters used in the function, and their values.

The following example shows a Verilog HDL file that instantiates the lpm_ram_dq function. A comment in the Module Declaration contains the syn_black_box directive and parameter names and values. This comment must immediately follow the port list and precede the closing semicolon (;).

When you instantiate a library of parameterized modules (LPM) function, the LPM function name must be specified as the value of the LPM_TYPE parameter. In addition, each parameter must be listed on a separate line.

The following example shows a direct instantiation of an LPM function. Use the IP Catalog to create the function, and then instantiate it in a design, refer to the Creating a Design for Use with the Synplify Software topic.

// Define the black box
module myram64x16 (data,address,inclock,outclock,we,q)
/* syn_black_box 
   LPM_WIDTH=16 
   LPM_WIDTHAD=6 
   
LPM_TYPE="LPM_RAM_DQ"  */ ; 
input [15:0] data;
input [5:0] address;
input inclock, outclock;
input we;
output [15:0] q;
endmodule
// Instantiate the LPM parameterized module in the 
//    higher-level module myram
module 
myram(clock, we, data, address, q);
input clock, we;
input [15:0] data;
input [5:0] address;
output [15:0] q;
       myram_64x16 inst1 (data, address, clock, clock, we, q);
endmodule