Intel® FPGA Technical Training目錄

{"limitDisplayedContent":"showAll","collectionRelationTags":{"relations":{"OR":["etm-932199fcafcc4517bbfcc4d2cc1b6372","etm-7bccbd65d318426aa45eafa0a326300d","etm-ed995115f7784ad5b5a391fe64966b64"],"EXCLUDE":["etm-ececc448f2f54f0e87cdf5558856b275","etm-f6e0d09943a943d383e81b5f64a3956c"],"AND":["etm-DA5A91DF-5E20-493F-9B3E-14E037831DF1"]},"featuredIds":[]},"collectionId":"653155","resultPerPage":400.0,"filters":[{"facetId":"ContentType","type":"ContentType","deprecated":true,"name":"ContentType","position":0},{"facetId":"guidetmbdb75e27c254410ca46a751183e100c5","field":"stm_10355_zh","type":"hierarchical","basePath":"Subject","displayName":"主題:FPGA設計","deprecated":false,"rootFilter":"guidetmbdb75e27c254410ca46a751183e100c5","rootPath":["Subject","Design","FPGA Design"],"position":1},{"facetId":"guidetm83741EA404664A899395C861EDA3D38B","field":"stm_10385_zh","type":"hierarchical","basePath":"Primary Content Tagging","displayName":"FPGA裝置系列","deprecated":false,"rootFilter":"guidetm83741EA404664A899395C861EDA3D38B","rootPath":["Primary Content Tagging","Intel® FPGA","Intel® 可程式裝置"],"position":2},{"facetId":"@stm_10391_zh","field":"stm_10391_zh","type":"specific","basePath":"Audience","displayName":"Audience","deprecated":false,"rootFilter":"","position":3},{"facetId":"lastupdated","type":"lastupdated","deprecated":true,"name":"lastupdated","position":4}],"coveoRequestHardLimit":"1000","accessDetailsPagePath":"/content/www/us/en/secure/design/internal/access-details.html","collectionGuids":["etm-DA5A91DF-5E20-493F-9B3E-14E037831DF1"],"cardView":false,"sorting":"AtoZ","defaultImagesPath":"/content/dam/www/public/us/en/images/uatable/default-icons","coveoMaxResults":5000,"coveoSplitSize":500,"fpgaFacetRootPaths":"{\"fpgadevicefamily\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Programmable Devices\"],\"quartusedition\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software\"],\"quartusaddon\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® Quartus Software - Add-ons\"],\"fpgaplatform\":[\"Primary Content Tagging\",\"Intel® FPGAs\",\"Intel® FPGA Platforms\"]}","newWrapperPageEnabled":true,"descendingSortingForNumericalFacetsName":"[\"Intel® Quartus® Prime Pro Edition\",\"Intel® Quartus® Prime Lite Edition\",\"Intel® Quartus® Prime Standard Edition\",\"Quartus® II Subscription Edition\",\"Quartus® II Web Edition\"]","columnsConfiguration":{"idColumn":false,"dateColumn":false,"versionColumn":false,"contentTypeColumn":true,"columnsMaxSize":0},"dynamicColumnsConfiguration":[{"name":"DynamicColumn_contenttype","type":"contenttype","gtv":"內容類型","width":135,"selected":true}],"updateCollateralMetadataEnabled":true,"relatedAssetsEnable":true,"disableExpandCollapseAll":false,"enableRelatedAssetsOnExpandAll":false,"disableBlueBanner":false,"isICS":false}

這個頁面的內容綜合了英文原始內容的人工翻譯譯文與機器翻譯譯文。本內容是基於一般資訊目的,方便您參考而提供,不應視同完整或準確的內容。如果這個頁面的英文版與譯文之間發生任何牴觸,將受英文版規範及管轄。 查看這個頁面的英文版。